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<a href="#define-members">Macros</a>  </div>
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<div class="title">mcuconf.h File Reference</div>  </div>
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<p><a href="../../d6/d97/mcuconf_8h_source.html">Go to the source code of this file.</a></p>
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Macros</h2></td></tr>
<tr class="memitem:a6c41ac9534659a9a1d50d6772bdb7c91"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="../../d6/d97/mcuconf_8h.html#a6c41ac9534659a9a1d50d6772bdb7c91">STM32F4xx_MCUCONF</a></td></tr>
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</table>
<h2 class="groupheader">Macro Definition Documentation</h2>
<a class="anchor" id="a19080c8c395ae24df995fa57a2291465"></a>
<div class="memitem">
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          <td class="memname">#define STM32_ADC_ADC1_DMA_IRQ_PRIORITY&#160;&#160;&#160;6</td>
        </tr>
      </table>
</div><div class="memdoc">

</div>
</div>
<a class="anchor" id="ad19de93466026d8b03a895cae792bce9"></a>
<div class="memitem">
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        <tr>
          <td class="memname">#define STM32_ADC_ADC1_DMA_PRIORITY&#160;&#160;&#160;2</td>
        </tr>
      </table>
</div><div class="memdoc">

</div>
</div>
<a class="anchor" id="a5a1f7bc818507d43f4d6592bff2ad486"></a>
<div class="memitem">
<div class="memproto">
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        <tr>
          <td class="memname">#define STM32_ADC_ADC1_DMA_STREAM&#160;&#160;&#160;STM32_DMA_STREAM_ID(2, 4)</td>
        </tr>
      </table>
</div><div class="memdoc">

</div>
</div>
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<div class="memproto">
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          <td class="memname">#define STM32_ADC_ADC2_DMA_IRQ_PRIORITY&#160;&#160;&#160;6</td>
        </tr>
      </table>
</div><div class="memdoc">

</div>
</div>
<a class="anchor" id="a65cadd46c1d4b5739f1ef3a623faf196"></a>
<div class="memitem">
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      <table class="memname">
        <tr>
          <td class="memname">#define STM32_ADC_ADC2_DMA_PRIORITY&#160;&#160;&#160;2</td>
        </tr>
      </table>
</div><div class="memdoc">

</div>
</div>
<a class="anchor" id="a14406df3e82b63f96a67959b5dbff667"></a>
<div class="memitem">
<div class="memproto">
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        <tr>
          <td class="memname">#define STM32_ADC_ADC2_DMA_STREAM&#160;&#160;&#160;STM32_DMA_STREAM_ID(2, 2)</td>
        </tr>
      </table>
</div><div class="memdoc">

</div>
</div>
<a class="anchor" id="a45424a47f5a33df11692d9763b72aa48"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define STM32_ADC_ADC3_DMA_IRQ_PRIORITY&#160;&#160;&#160;6</td>
        </tr>
      </table>
</div><div class="memdoc">

</div>
</div>
<a class="anchor" id="aba49d4d898766a690874ccc9e072e4e4"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define STM32_ADC_ADC3_DMA_PRIORITY&#160;&#160;&#160;2</td>
        </tr>
      </table>
</div><div class="memdoc">

</div>
</div>
<a class="anchor" id="ab34182c029cd8f6e924f1b449e3bae0e"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define STM32_ADC_ADC3_DMA_STREAM&#160;&#160;&#160;STM32_DMA_STREAM_ID(2, 1)</td>
        </tr>
      </table>
</div><div class="memdoc">

</div>
</div>
<a class="anchor" id="a47f41637b35e1b3176029cd1ea95e481"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define STM32_ADC_ADCPRE&#160;&#160;&#160;ADC_CCR_ADCPRE_DIV4</td>
        </tr>
      </table>
</div><div class="memdoc">

</div>
</div>
<a class="anchor" id="a58e21948e78c6cf50c04e64363637dd4"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define STM32_ADC_IRQ_PRIORITY&#160;&#160;&#160;6</td>
        </tr>
      </table>
</div><div class="memdoc">

</div>
</div>
<a class="anchor" id="a7256aa7c13b88f877cfb8d4913dcec0a"></a>
<div class="memitem">
<div class="memproto">
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        <tr>
          <td class="memname">#define STM32_ADC_USE_ADC1&#160;&#160;&#160;FALSE</td>
        </tr>
      </table>
</div><div class="memdoc">

</div>
</div>
<a class="anchor" id="a0324f80d5775896053a81432c0475ac3"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define STM32_ADC_USE_ADC2&#160;&#160;&#160;FALSE</td>
        </tr>
      </table>
</div><div class="memdoc">

</div>
</div>
<a class="anchor" id="abdbb6a582b057e5065023d7b0fb27821"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define STM32_ADC_USE_ADC3&#160;&#160;&#160;FALSE</td>
        </tr>
      </table>
</div><div class="memdoc">

</div>
</div>
<a class="anchor" id="a2fc47be2589d2a861f2a7e94048d7035"></a>
<div class="memitem">
<div class="memproto">
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        <tr>
          <td class="memname">#define STM32_BKPRAM_ENABLE&#160;&#160;&#160;FALSE</td>
        </tr>
      </table>
</div><div class="memdoc">

</div>
</div>
<a class="anchor" id="abe8dc2c331e59b626884d0b40433bfab"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define STM32_CAN_CAN1_IRQ_PRIORITY&#160;&#160;&#160;11</td>
        </tr>
      </table>
</div><div class="memdoc">

</div>
</div>
<a class="anchor" id="aea17e07d4f22e7757ac6193ab9d72a15"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define STM32_CAN_CAN2_IRQ_PRIORITY&#160;&#160;&#160;11</td>
        </tr>
      </table>
</div><div class="memdoc">

</div>
</div>
<a class="anchor" id="a89f37b0b924eaabb6185f95446eed1dd"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define STM32_CAN_USE_CAN1&#160;&#160;&#160;TRUE</td>
        </tr>
      </table>
</div><div class="memdoc">

</div>
</div>
<a class="anchor" id="a00b873df699111f00e6093ed5759e08e"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define STM32_CAN_USE_CAN2&#160;&#160;&#160;FALSE</td>
        </tr>
      </table>
</div><div class="memdoc">

</div>
</div>
<a class="anchor" id="ab61440cd331858b31458b3ce72abf906"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define STM32_CLOCK48_REQUIRED&#160;&#160;&#160;TRUE</td>
        </tr>
      </table>
</div><div class="memdoc">

</div>
</div>
<a class="anchor" id="aa6279da05e644a4bd3bc531159ad34e6"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define STM32_EXT_EXTI0_IRQ_PRIORITY&#160;&#160;&#160;6</td>
        </tr>
      </table>
</div><div class="memdoc">

</div>
</div>
<a class="anchor" id="a3c45031ace768dff11d3791a466a7ad1"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define STM32_EXT_EXTI10_15_IRQ_PRIORITY&#160;&#160;&#160;6</td>
        </tr>
      </table>
</div><div class="memdoc">

</div>
</div>
<a class="anchor" id="abd53222576d825b8a23d1d9fd6d78a6a"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define STM32_EXT_EXTI16_IRQ_PRIORITY&#160;&#160;&#160;6</td>
        </tr>
      </table>
</div><div class="memdoc">

</div>
</div>
<a class="anchor" id="aff4ce61159313e9c4b43dd1c0f61fd47"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define STM32_EXT_EXTI17_IRQ_PRIORITY&#160;&#160;&#160;15</td>
        </tr>
      </table>
</div><div class="memdoc">

</div>
</div>
<a class="anchor" id="a12385bdf4411e5e3f9df2d0fc03f9873"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define STM32_EXT_EXTI18_IRQ_PRIORITY&#160;&#160;&#160;6</td>
        </tr>
      </table>
</div><div class="memdoc">

</div>
</div>
<a class="anchor" id="a22b733cbda9a4d21a53651971aa06372"></a>
<div class="memitem">
<div class="memproto">
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        <tr>
          <td class="memname">#define STM32_EXT_EXTI19_IRQ_PRIORITY&#160;&#160;&#160;6</td>
        </tr>
      </table>
</div><div class="memdoc">

</div>
</div>
<a class="anchor" id="ac582474e7199168a6fb09792124d6546"></a>
<div class="memitem">
<div class="memproto">
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        <tr>
          <td class="memname">#define STM32_EXT_EXTI1_IRQ_PRIORITY&#160;&#160;&#160;6</td>
        </tr>
      </table>
</div><div class="memdoc">

</div>
</div>
<a class="anchor" id="a24c4b2fdc18208fbc2211c5b48a2cfc6"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define STM32_EXT_EXTI20_IRQ_PRIORITY&#160;&#160;&#160;6</td>
        </tr>
      </table>
</div><div class="memdoc">

</div>
</div>
<a class="anchor" id="aec9a95278305e7db267347988f442947"></a>
<div class="memitem">
<div class="memproto">
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        <tr>
          <td class="memname">#define STM32_EXT_EXTI21_IRQ_PRIORITY&#160;&#160;&#160;15</td>
        </tr>
      </table>
</div><div class="memdoc">

</div>
</div>
<a class="anchor" id="ac1360f0e97a4f7df89fd715f42ebaea7"></a>
<div class="memitem">
<div class="memproto">
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        <tr>
          <td class="memname">#define STM32_EXT_EXTI22_IRQ_PRIORITY&#160;&#160;&#160;15</td>
        </tr>
      </table>
</div><div class="memdoc">

</div>
</div>
<a class="anchor" id="a32a5323ec55bfb3e6590c8346ee76dc4"></a>
<div class="memitem">
<div class="memproto">
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        <tr>
          <td class="memname">#define STM32_EXT_EXTI2_IRQ_PRIORITY&#160;&#160;&#160;6</td>
        </tr>
      </table>
</div><div class="memdoc">

</div>
</div>
<a class="anchor" id="a360ce89f2744ed7e4ec5789201f557c3"></a>
<div class="memitem">
<div class="memproto">
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        <tr>
          <td class="memname">#define STM32_EXT_EXTI3_IRQ_PRIORITY&#160;&#160;&#160;6</td>
        </tr>
      </table>
</div><div class="memdoc">

</div>
</div>
<a class="anchor" id="a09f92055e4901d4dc7613422ff8ca83e"></a>
<div class="memitem">
<div class="memproto">
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        <tr>
          <td class="memname">#define STM32_EXT_EXTI4_IRQ_PRIORITY&#160;&#160;&#160;6</td>
        </tr>
      </table>
</div><div class="memdoc">

</div>
</div>
<a class="anchor" id="afb8ec40127fee7c2c398e9e2ec096a71"></a>
<div class="memitem">
<div class="memproto">
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        <tr>
          <td class="memname">#define STM32_EXT_EXTI5_9_IRQ_PRIORITY&#160;&#160;&#160;6</td>
        </tr>
      </table>
</div><div class="memdoc">

</div>
</div>
<a class="anchor" id="a1e249eb52e9aafc7325e6cfde76db4cf"></a>
<div class="memitem">
<div class="memproto">
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        <tr>
          <td class="memname">#define STM32_GPT_TIM1_IRQ_PRIORITY&#160;&#160;&#160;7</td>
        </tr>
      </table>
</div><div class="memdoc">

</div>
</div>
<a class="anchor" id="a314cec15b23670096752964ec5caf3ce"></a>
<div class="memitem">
<div class="memproto">
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        <tr>
          <td class="memname">#define STM32_GPT_TIM2_IRQ_PRIORITY&#160;&#160;&#160;7</td>
        </tr>
      </table>
</div><div class="memdoc">

</div>
</div>
<a class="anchor" id="aa0e96044581d47cc827e2cbeb0227a8e"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define STM32_GPT_TIM3_IRQ_PRIORITY&#160;&#160;&#160;7</td>
        </tr>
      </table>
</div><div class="memdoc">

</div>
</div>
<a class="anchor" id="a3f29be9a3823107fef0db45e685c21c8"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define STM32_GPT_TIM4_IRQ_PRIORITY&#160;&#160;&#160;7</td>
        </tr>
      </table>
</div><div class="memdoc">

</div>
</div>
<a class="anchor" id="a7dd2cd16d440c306ca4078c26c6b32a1"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define STM32_GPT_TIM5_IRQ_PRIORITY&#160;&#160;&#160;7</td>
        </tr>
      </table>
</div><div class="memdoc">

</div>
</div>
<a class="anchor" id="a93f570ee0efe3af8c1584d66c00b99ad"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define STM32_GPT_TIM8_IRQ_PRIORITY&#160;&#160;&#160;7</td>
        </tr>
      </table>
</div><div class="memdoc">

</div>
</div>
<a class="anchor" id="a44c0e5a4a20e05dbb598a408cf1ebee7"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define STM32_GPT_USE_TIM1&#160;&#160;&#160;FALSE</td>
        </tr>
      </table>
</div><div class="memdoc">

</div>
</div>
<a class="anchor" id="a87dac50603730367a564c5ba63c6e9a1"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define STM32_GPT_USE_TIM2&#160;&#160;&#160;FALSE</td>
        </tr>
      </table>
</div><div class="memdoc">

</div>
</div>
<a class="anchor" id="a13e83c85f2c204e9302199f07dfc982e"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define STM32_GPT_USE_TIM3&#160;&#160;&#160;FALSE</td>
        </tr>
      </table>
</div><div class="memdoc">

</div>
</div>
<a class="anchor" id="a8433ca3b26de12e90ad85d24ddc146ae"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define STM32_GPT_USE_TIM4&#160;&#160;&#160;FALSE</td>
        </tr>
      </table>
</div><div class="memdoc">

</div>
</div>
<a class="anchor" id="a742ec02fd96ff66ed1de33aef54f0707"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define STM32_GPT_USE_TIM5&#160;&#160;&#160;FALSE</td>
        </tr>
      </table>
</div><div class="memdoc">

</div>
</div>
<a class="anchor" id="a1b1fc49ad496637c0d24c274c6c17c01"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define STM32_GPT_USE_TIM8&#160;&#160;&#160;FALSE</td>
        </tr>
      </table>
</div><div class="memdoc">

</div>
</div>
<a class="anchor" id="a035ea0d8259c0f89306c6a7d344705f2"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define STM32_HPRE&#160;&#160;&#160;STM32_HPRE_DIV1</td>
        </tr>
      </table>
</div><div class="memdoc">

</div>
</div>
<a class="anchor" id="ad94c4a0da6c8c7a3d0b800fdc0dbebfa"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define STM32_HSE_ENABLED&#160;&#160;&#160;TRUE</td>
        </tr>
      </table>
</div><div class="memdoc">

</div>
</div>
<a class="anchor" id="a2044f0288f2c20b27d6eee1e1a1e6256"></a>
<div class="memitem">
<div class="memproto">
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        <tr>
          <td class="memname">#define STM32_HSI_ENABLED&#160;&#160;&#160;TRUE</td>
        </tr>
      </table>
</div><div class="memdoc">

</div>
</div>
<a class="anchor" id="a88233de21433efe0a1f87f81b49354b9"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define STM32_I2C_I2C1_DMA_ERROR_HOOK</td>
          <td>(</td>
          <td class="paramname"></td><td>)</td>
          <td>&#160;&#160;&#160;chSysHalt()</td>
        </tr>
      </table>
</div><div class="memdoc">

</div>
</div>
<a class="anchor" id="afd104f0cde2014ea9788f9e3f71de00a"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define STM32_I2C_I2C1_DMA_PRIORITY&#160;&#160;&#160;3</td>
        </tr>
      </table>
</div><div class="memdoc">

</div>
</div>
<a class="anchor" id="a904706fc1fb970ddb6dc919a651cbc48"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define STM32_I2C_I2C1_IRQ_PRIORITY&#160;&#160;&#160;5</td>
        </tr>
      </table>
</div><div class="memdoc">

</div>
</div>
<a class="anchor" id="adae68423fc725ae1da125e4929e6de73"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define STM32_I2C_I2C1_RX_DMA_STREAM&#160;&#160;&#160;STM32_DMA_STREAM_ID(1, 0)</td>
        </tr>
      </table>
</div><div class="memdoc">

</div>
</div>
<a class="anchor" id="aaad3d45e3630b5efb746260aedba2bd2"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define STM32_I2C_I2C1_TX_DMA_STREAM&#160;&#160;&#160;STM32_DMA_STREAM_ID(1, 6)</td>
        </tr>
      </table>
</div><div class="memdoc">

</div>
</div>
<a class="anchor" id="aa80cfed498ee589fdb974ccdaca629c0"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define STM32_I2C_I2C2_DMA_ERROR_HOOK</td>
          <td>(</td>
          <td class="paramname"></td><td>)</td>
          <td>&#160;&#160;&#160;chSysHalt()</td>
        </tr>
      </table>
</div><div class="memdoc">

</div>
</div>
<a class="anchor" id="a6b4a662792401dae73ae072183bd8e02"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define STM32_I2C_I2C2_DMA_PRIORITY&#160;&#160;&#160;3</td>
        </tr>
      </table>
</div><div class="memdoc">

</div>
</div>
<a class="anchor" id="ace43c4d497b0be3dbe8c28836fafd0a5"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define STM32_I2C_I2C2_IRQ_PRIORITY&#160;&#160;&#160;5</td>
        </tr>
      </table>
</div><div class="memdoc">

</div>
</div>
<a class="anchor" id="a2b4cea50a1c9434b330a6a6f13432e00"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define STM32_I2C_I2C2_RX_DMA_STREAM&#160;&#160;&#160;STM32_DMA_STREAM_ID(1, 2)</td>
        </tr>
      </table>
</div><div class="memdoc">

</div>
</div>
<a class="anchor" id="a3170ef2ff695720e55d0957eb1951a99"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define STM32_I2C_I2C2_TX_DMA_STREAM&#160;&#160;&#160;STM32_DMA_STREAM_ID(1, 7)</td>
        </tr>
      </table>
</div><div class="memdoc">

</div>
</div>
<a class="anchor" id="aa75cee4ccf4d37c002ce95e824ed5494"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define STM32_I2C_I2C3_DMA_ERROR_HOOK</td>
          <td>(</td>
          <td class="paramname"></td><td>)</td>
          <td>&#160;&#160;&#160;chSysHalt()</td>
        </tr>
      </table>
</div><div class="memdoc">

</div>
</div>
<a class="anchor" id="a43838b989448ecf9013b0e07e8bba565"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define STM32_I2C_I2C3_DMA_PRIORITY&#160;&#160;&#160;3</td>
        </tr>
      </table>
</div><div class="memdoc">

</div>
</div>
<a class="anchor" id="a978ffaebe063c8a9f64525ed2f13bd09"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define STM32_I2C_I2C3_IRQ_PRIORITY&#160;&#160;&#160;5</td>
        </tr>
      </table>
</div><div class="memdoc">

</div>
</div>
<a class="anchor" id="a39873d5a932294ccab14f1bdd766fffb"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define STM32_I2C_I2C3_RX_DMA_STREAM&#160;&#160;&#160;STM32_DMA_STREAM_ID(1, 2)</td>
        </tr>
      </table>
</div><div class="memdoc">

</div>
</div>
<a class="anchor" id="a9ac12a927168fe9a90122b0a54110e24"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define STM32_I2C_I2C3_TX_DMA_STREAM&#160;&#160;&#160;STM32_DMA_STREAM_ID(1, 4)</td>
        </tr>
      </table>
</div><div class="memdoc">

</div>
</div>
<a class="anchor" id="ad73fb3ae5b2aca05e0f5155cff7a8b2d"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define STM32_I2C_USE_I2C1&#160;&#160;&#160;FALSE</td>
        </tr>
      </table>
</div><div class="memdoc">

</div>
</div>
<a class="anchor" id="a58845293676556a52d2046a00bcfbf9c"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define STM32_I2C_USE_I2C2&#160;&#160;&#160;TRUE</td>
        </tr>
      </table>
</div><div class="memdoc">

</div>
</div>
<a class="anchor" id="a086d8965c7249503bdce6f9b4a7352cb"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define STM32_I2C_USE_I2C3&#160;&#160;&#160;FALSE</td>
        </tr>
      </table>
</div><div class="memdoc">

</div>
</div>
<a class="anchor" id="a54203015c2973969adee1dd719010d3a"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define STM32_I2SSRC&#160;&#160;&#160;STM32_I2SSRC_CKIN</td>
        </tr>
      </table>
</div><div class="memdoc">

</div>
</div>
<a class="anchor" id="a51083eefd4e7d0303f11081df496d2ed"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define STM32_ICU_TIM1_IRQ_PRIORITY&#160;&#160;&#160;7</td>
        </tr>
      </table>
</div><div class="memdoc">

</div>
</div>
<a class="anchor" id="a639272943cb5b9bdcbd78e5ced2b52a0"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define STM32_ICU_TIM2_IRQ_PRIORITY&#160;&#160;&#160;7</td>
        </tr>
      </table>
</div><div class="memdoc">

</div>
</div>
<a class="anchor" id="a5a90d9b62fd7b1a0180c2aec7d00089d"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define STM32_ICU_TIM3_IRQ_PRIORITY&#160;&#160;&#160;7</td>
        </tr>
      </table>
</div><div class="memdoc">

</div>
</div>
<a class="anchor" id="a5c9e95d0806fd4faa34694d2f7ed8099"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define STM32_ICU_TIM4_IRQ_PRIORITY&#160;&#160;&#160;7</td>
        </tr>
      </table>
</div><div class="memdoc">

</div>
</div>
<a class="anchor" id="a4d41fed5b7b1c735e1ea5a26970dd564"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define STM32_ICU_TIM5_IRQ_PRIORITY&#160;&#160;&#160;7</td>
        </tr>
      </table>
</div><div class="memdoc">

</div>
</div>
<a class="anchor" id="a11ecef34dc3af18a62f81e90b34dde00"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define STM32_ICU_TIM8_IRQ_PRIORITY&#160;&#160;&#160;7</td>
        </tr>
      </table>
</div><div class="memdoc">

</div>
</div>
<a class="anchor" id="a5f5e9b802c24ad1637cd2aaee14606ed"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define STM32_ICU_USE_TIM1&#160;&#160;&#160;FALSE</td>
        </tr>
      </table>
</div><div class="memdoc">

</div>
</div>
<a class="anchor" id="a9d125141e8f301e2b6d590067fd7890e"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define STM32_ICU_USE_TIM2&#160;&#160;&#160;FALSE</td>
        </tr>
      </table>
</div><div class="memdoc">

</div>
</div>
<a class="anchor" id="a877fa83cee0173d5f451b77e59180725"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define STM32_ICU_USE_TIM3&#160;&#160;&#160;TRUE</td>
        </tr>
      </table>
</div><div class="memdoc">

</div>
</div>
<a class="anchor" id="a91c55b2ce77da8f5c236bc960b30beed"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define STM32_ICU_USE_TIM4&#160;&#160;&#160;FALSE</td>
        </tr>
      </table>
</div><div class="memdoc">

</div>
</div>
<a class="anchor" id="afbb5ae4322aab0bda8084bd23f3eeb56"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define STM32_ICU_USE_TIM5&#160;&#160;&#160;FALSE</td>
        </tr>
      </table>
</div><div class="memdoc">

</div>
</div>
<a class="anchor" id="a2b5d34aeac1b12c901e2fed5952ae29d"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define STM32_ICU_USE_TIM8&#160;&#160;&#160;FALSE</td>
        </tr>
      </table>
</div><div class="memdoc">

</div>
</div>
<a class="anchor" id="a05b49e91f478558d33b2b862718758fa"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define STM32_LSE_ENABLED&#160;&#160;&#160;FALSE</td>
        </tr>
      </table>
</div><div class="memdoc">

</div>
</div>
<a class="anchor" id="a02b4e3e6222baab7ee448cbbb2273370"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define STM32_LSI_ENABLED&#160;&#160;&#160;TRUE</td>
        </tr>
      </table>
</div><div class="memdoc">

</div>
</div>
<a class="anchor" id="aeadb80a063dd3d4975ca3947a18ff995"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define STM32_MCO1PRE&#160;&#160;&#160;STM32_MCO1PRE_DIV1</td>
        </tr>
      </table>
</div><div class="memdoc">

</div>
</div>
<a class="anchor" id="a66f4dea2ca69a6afdc2a05593ddb4999"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define STM32_MCO1SEL&#160;&#160;&#160;STM32_MCO1SEL_HSI</td>
        </tr>
      </table>
</div><div class="memdoc">

</div>
</div>
<a class="anchor" id="a7625378f7bf7e1a50a58739742839619"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define STM32_MCO2PRE&#160;&#160;&#160;STM32_MCO2PRE_DIV5</td>
        </tr>
      </table>
</div><div class="memdoc">

</div>
</div>
<a class="anchor" id="ada1164056ea271b26c923140f69ace87"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define STM32_MCO2SEL&#160;&#160;&#160;STM32_MCO2SEL_SYSCLK</td>
        </tr>
      </table>
</div><div class="memdoc">

</div>
</div>
<a class="anchor" id="affb519ca907542b6bff9104700c0009d"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define STM32_NO_INIT&#160;&#160;&#160;FALSE</td>
        </tr>
      </table>
</div><div class="memdoc">

</div>
</div>
<a class="anchor" id="aa2179285dbf70d5d5a370c3353737813"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define STM32_PLLI2SN_VALUE&#160;&#160;&#160;192</td>
        </tr>
      </table>
</div><div class="memdoc">

</div>
</div>
<a class="anchor" id="aa6385bafac509e5ef0926a722fc54adb"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define STM32_PLLI2SR_VALUE&#160;&#160;&#160;5</td>
        </tr>
      </table>
</div><div class="memdoc">

</div>
</div>
<a class="anchor" id="acba56aaa8c0bd717ad217771ee8300c2"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define STM32_PLLM_VALUE&#160;&#160;&#160;8</td>
        </tr>
      </table>
</div><div class="memdoc">

</div>
</div>
<a class="anchor" id="a42a8bb439be9c6c643c7ab48f02ee662"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define STM32_PLLN_VALUE&#160;&#160;&#160;336</td>
        </tr>
      </table>
</div><div class="memdoc">

</div>
</div>
<a class="anchor" id="a0a2a10496ad437bb1bf6bf23892148e4"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define STM32_PLLP_VALUE&#160;&#160;&#160;2</td>
        </tr>
      </table>
</div><div class="memdoc">

</div>
</div>
<a class="anchor" id="adc27d1e2fcdedcb56fc15a41e5f43d91"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define STM32_PLLQ_VALUE&#160;&#160;&#160;7</td>
        </tr>
      </table>
</div><div class="memdoc">

</div>
</div>
<a class="anchor" id="a811cfbd049f0ab00976def9593849d32"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define STM32_PLLSRC&#160;&#160;&#160;STM32_PLLSRC_HSE</td>
        </tr>
      </table>
</div><div class="memdoc">

</div>
</div>
<a class="anchor" id="a6f4f9c19c6b1a1c3694278a542e3c60d"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define STM32_PLS&#160;&#160;&#160;STM32_PLS_LEV0</td>
        </tr>
      </table>
</div><div class="memdoc">

</div>
</div>
<a class="anchor" id="a5f9c3734d5d06c9ccd5214af5c78c4f8"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define STM32_PPRE1&#160;&#160;&#160;STM32_PPRE1_DIV4</td>
        </tr>
      </table>
</div><div class="memdoc">

</div>
</div>
<a class="anchor" id="a3670f3886d02bb3010016bbf0db0db83"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define STM32_PPRE2&#160;&#160;&#160;STM32_PPRE2_DIV2</td>
        </tr>
      </table>
</div><div class="memdoc">

</div>
</div>
<a class="anchor" id="ab70d9b5c3764aac6282d594d8f6a88ec"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define STM32_PVD_ENABLE&#160;&#160;&#160;FALSE</td>
        </tr>
      </table>
</div><div class="memdoc">

</div>
</div>
<a class="anchor" id="ae631e1c4b6541c9d67de9d009196b770"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define STM32_PWM_TIM1_IRQ_PRIORITY&#160;&#160;&#160;7</td>
        </tr>
      </table>
</div><div class="memdoc">

</div>
</div>
<a class="anchor" id="a01b2a27910cfaed8a40043c8efe1e9a4"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define STM32_PWM_TIM2_IRQ_PRIORITY&#160;&#160;&#160;7</td>
        </tr>
      </table>
</div><div class="memdoc">

</div>
</div>
<a class="anchor" id="a8b4f8d9d4308f0503738704437284592"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define STM32_PWM_TIM3_IRQ_PRIORITY&#160;&#160;&#160;7</td>
        </tr>
      </table>
</div><div class="memdoc">

</div>
</div>
<a class="anchor" id="a072aabc3f06ec1702c1fc5eb3c6b01f8"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define STM32_PWM_TIM4_IRQ_PRIORITY&#160;&#160;&#160;7</td>
        </tr>
      </table>
</div><div class="memdoc">

</div>
</div>
<a class="anchor" id="ab5e7265edffef2f0b796b755ca4cfbad"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define STM32_PWM_TIM5_IRQ_PRIORITY&#160;&#160;&#160;7</td>
        </tr>
      </table>
</div><div class="memdoc">

</div>
</div>
<a class="anchor" id="ab879e56e8632bb4beb029c28133cc504"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define STM32_PWM_TIM8_IRQ_PRIORITY&#160;&#160;&#160;7</td>
        </tr>
      </table>
</div><div class="memdoc">

</div>
</div>
<a class="anchor" id="a554728f749ad9aca0102d189cc6bb9e7"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define STM32_PWM_USE_ADVANCED&#160;&#160;&#160;FALSE</td>
        </tr>
      </table>
</div><div class="memdoc">

</div>
</div>
<a class="anchor" id="a6f066eafb341c481f419dc609e1cd147"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define STM32_PWM_USE_TIM1&#160;&#160;&#160;FALSE</td>
        </tr>
      </table>
</div><div class="memdoc">

</div>
</div>
<a class="anchor" id="a061e9a31faab6d787c73d7f21893e483"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define STM32_PWM_USE_TIM2&#160;&#160;&#160;FALSE</td>
        </tr>
      </table>
</div><div class="memdoc">

</div>
</div>
<a class="anchor" id="a3f108deab28dba83858c5a6d5089a322"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define STM32_PWM_USE_TIM3&#160;&#160;&#160;FALSE</td>
        </tr>
      </table>
</div><div class="memdoc">

</div>
</div>
<a class="anchor" id="aa4ecf8f03432b8aabf2f96ca370310d6"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define STM32_PWM_USE_TIM4&#160;&#160;&#160;FALSE</td>
        </tr>
      </table>
</div><div class="memdoc">

</div>
</div>
<a class="anchor" id="ae98fcb3612d26b3cf74c2d28e4994249"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define STM32_PWM_USE_TIM5&#160;&#160;&#160;FALSE</td>
        </tr>
      </table>
</div><div class="memdoc">

</div>
</div>
<a class="anchor" id="af9be48d9e825a860764b4a928124f046"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define STM32_PWM_USE_TIM8&#160;&#160;&#160;FALSE</td>
        </tr>
      </table>
</div><div class="memdoc">

</div>
</div>
<a class="anchor" id="aea50a21db71009ebc7951180dc0d29ea"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define STM32_RTCPRE_VALUE&#160;&#160;&#160;8</td>
        </tr>
      </table>
</div><div class="memdoc">

</div>
</div>
<a class="anchor" id="a945eb1f70822303bd0191ef633e5eaca"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define STM32_RTCSEL&#160;&#160;&#160;STM32_RTCSEL_LSI</td>
        </tr>
      </table>
</div><div class="memdoc">

</div>
</div>
<a class="anchor" id="a2bc2adc3f0b24eadf5705b40f03b7648"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define STM32_SERIAL_UART4_PRIORITY&#160;&#160;&#160;12</td>
        </tr>
      </table>
</div><div class="memdoc">

</div>
</div>
<a class="anchor" id="a868d30e39ec6441e34b33a9db1028d60"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define STM32_SERIAL_UART5_PRIORITY&#160;&#160;&#160;12</td>
        </tr>
      </table>
</div><div class="memdoc">

</div>
</div>
<a class="anchor" id="a7509c7a01a83276aa7768474357ec61d"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define STM32_SERIAL_USART1_PRIORITY&#160;&#160;&#160;12</td>
        </tr>
      </table>
</div><div class="memdoc">

</div>
</div>
<a class="anchor" id="a562945e4ccd2bca4a4277eaa05ae70a0"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define STM32_SERIAL_USART2_PRIORITY&#160;&#160;&#160;12</td>
        </tr>
      </table>
</div><div class="memdoc">

</div>
</div>
<a class="anchor" id="a228a6b5e5aed69db051dcea1ef58232a"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define STM32_SERIAL_USART3_PRIORITY&#160;&#160;&#160;12</td>
        </tr>
      </table>
</div><div class="memdoc">

</div>
</div>
<a class="anchor" id="ad4450f9b0b7a50cdf4f86c67a67d030b"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define STM32_SERIAL_USART6_PRIORITY&#160;&#160;&#160;12</td>
        </tr>
      </table>
</div><div class="memdoc">

</div>
</div>
<a class="anchor" id="a9863e1adf0d2aab7bf31b61fe4a6118e"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define STM32_SERIAL_USE_UART4&#160;&#160;&#160;FALSE</td>
        </tr>
      </table>
</div><div class="memdoc">

</div>
</div>
<a class="anchor" id="a6366c26f605ce31e89deee1af686f5e6"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define STM32_SERIAL_USE_UART5&#160;&#160;&#160;FALSE</td>
        </tr>
      </table>
</div><div class="memdoc">

</div>
</div>
<a class="anchor" id="a7f657adda8b7f6aa955f0806a29b0b9d"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define STM32_SERIAL_USE_USART1&#160;&#160;&#160;FALSE</td>
        </tr>
      </table>
</div><div class="memdoc">

</div>
</div>
<a class="anchor" id="acf6b4949732fac0a1ded862174aabba7"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define STM32_SERIAL_USE_USART2&#160;&#160;&#160;FALSE</td>
        </tr>
      </table>
</div><div class="memdoc">

</div>
</div>
<a class="anchor" id="a59976b6c28b2561d2b6bd7e3940ea377"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define STM32_SERIAL_USE_USART3&#160;&#160;&#160;FALSE</td>
        </tr>
      </table>
</div><div class="memdoc">

</div>
</div>
<a class="anchor" id="a5fa35e1fea5f5813af76c2d2b9c03215"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define STM32_SERIAL_USE_USART6&#160;&#160;&#160;FALSE</td>
        </tr>
      </table>
</div><div class="memdoc">

</div>
</div>
<a class="anchor" id="af6a0f6c973b16ba388800b8a7db9910c"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define STM32_SPI_DMA_ERROR_HOOK</td>
          <td>(</td>
          <td class="paramtype">&#160;</td>
          <td class="paramname">spip</td><td>)</td>
          <td>&#160;&#160;&#160;chSysHalt()</td>
        </tr>
      </table>
</div><div class="memdoc">

</div>
</div>
<a class="anchor" id="a22d3ce19419dc8bbc47f94c065f3271c"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define STM32_SPI_SPI1_DMA_PRIORITY&#160;&#160;&#160;1</td>
        </tr>
      </table>
</div><div class="memdoc">

</div>
</div>
<a class="anchor" id="a0b3f4734d9855324ef89b57cb9858e49"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define STM32_SPI_SPI1_IRQ_PRIORITY&#160;&#160;&#160;10</td>
        </tr>
      </table>
</div><div class="memdoc">

</div>
</div>
<a class="anchor" id="a620b74e1fca03c6e11c054d137c56524"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define STM32_SPI_SPI1_RX_DMA_STREAM&#160;&#160;&#160;STM32_DMA_STREAM_ID(2, 0)</td>
        </tr>
      </table>
</div><div class="memdoc">

</div>
</div>
<a class="anchor" id="a9f72e7206a6300a9d86bccf73f85279a"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define STM32_SPI_SPI1_TX_DMA_STREAM&#160;&#160;&#160;STM32_DMA_STREAM_ID(2, 3)</td>
        </tr>
      </table>
</div><div class="memdoc">

</div>
</div>
<a class="anchor" id="a90bd623120d1e54038094fba54ba05c0"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define STM32_SPI_SPI2_DMA_PRIORITY&#160;&#160;&#160;1</td>
        </tr>
      </table>
</div><div class="memdoc">

</div>
</div>
<a class="anchor" id="a47d90eaca23f3eea99d74d1bb3539541"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define STM32_SPI_SPI2_IRQ_PRIORITY&#160;&#160;&#160;10</td>
        </tr>
      </table>
</div><div class="memdoc">

</div>
</div>
<a class="anchor" id="aa499e5a7c6352b58178e0651483d88ee"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define STM32_SPI_SPI2_RX_DMA_STREAM&#160;&#160;&#160;STM32_DMA_STREAM_ID(1, 3)</td>
        </tr>
      </table>
</div><div class="memdoc">

</div>
</div>
<a class="anchor" id="a9aefcd7246075d08426d5bc833e86b97"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define STM32_SPI_SPI2_TX_DMA_STREAM&#160;&#160;&#160;STM32_DMA_STREAM_ID(1, 4)</td>
        </tr>
      </table>
</div><div class="memdoc">

</div>
</div>
<a class="anchor" id="a0330335b8223bb2fd7b30a8bf6748a25"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define STM32_SPI_SPI3_DMA_PRIORITY&#160;&#160;&#160;1</td>
        </tr>
      </table>
</div><div class="memdoc">

</div>
</div>
<a class="anchor" id="a311306228435a4ddb879e8f0d80e3c10"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define STM32_SPI_SPI3_IRQ_PRIORITY&#160;&#160;&#160;10</td>
        </tr>
      </table>
</div><div class="memdoc">

</div>
</div>
<a class="anchor" id="acb9e4ecbe8f121a049306536fa66542c"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define STM32_SPI_SPI3_RX_DMA_STREAM&#160;&#160;&#160;STM32_DMA_STREAM_ID(1, 0)</td>
        </tr>
      </table>
</div><div class="memdoc">

</div>
</div>
<a class="anchor" id="a4d7890ef7b4b607b90eb9eafae504f0d"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define STM32_SPI_SPI3_TX_DMA_STREAM&#160;&#160;&#160;STM32_DMA_STREAM_ID(1, 7)</td>
        </tr>
      </table>
</div><div class="memdoc">

</div>
</div>
<a class="anchor" id="af105fbdfb7b9076472b373ed0c7b3fef"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define STM32_SPI_USE_SPI1&#160;&#160;&#160;FALSE</td>
        </tr>
      </table>
</div><div class="memdoc">

</div>
</div>
<a class="anchor" id="a626416dc22cf5f3deff2a8c7d8efa5b2"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define STM32_SPI_USE_SPI2&#160;&#160;&#160;FALSE</td>
        </tr>
      </table>
</div><div class="memdoc">

</div>
</div>
<a class="anchor" id="afe588bf112fc8f8a22c767aa3d3bcbb7"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define STM32_SPI_USE_SPI3&#160;&#160;&#160;FALSE</td>
        </tr>
      </table>
</div><div class="memdoc">

</div>
</div>
<a class="anchor" id="a29204b81c265dd6e124fbcf12a2c8d6f"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define STM32_SW&#160;&#160;&#160;STM32_SW_PLL</td>
        </tr>
      </table>
</div><div class="memdoc">

</div>
</div>
<a class="anchor" id="acc546d67e53045b28221aa720c39fcb7"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define STM32_UART_DMA_ERROR_HOOK</td>
          <td>(</td>
          <td class="paramtype">&#160;</td>
          <td class="paramname">uartp</td><td>)</td>
          <td>&#160;&#160;&#160;chSysHalt()</td>
        </tr>
      </table>
</div><div class="memdoc">

</div>
</div>
<a class="anchor" id="a8307c6c43bf456405efe19e5908d5a25"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define STM32_UART_USART1_DMA_PRIORITY&#160;&#160;&#160;0</td>
        </tr>
      </table>
</div><div class="memdoc">

</div>
</div>
<a class="anchor" id="a050fc59913309402f34dd2ea6ab3cdf8"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define STM32_UART_USART1_IRQ_PRIORITY&#160;&#160;&#160;12</td>
        </tr>
      </table>
</div><div class="memdoc">

</div>
</div>
<a class="anchor" id="a969b79cb637b8b69cec9257705d74484"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define STM32_UART_USART1_RX_DMA_STREAM&#160;&#160;&#160;STM32_DMA_STREAM_ID(2, 5)</td>
        </tr>
      </table>
</div><div class="memdoc">

</div>
</div>
<a class="anchor" id="a02c568ae2c758034cdf478f81b447af3"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define STM32_UART_USART1_TX_DMA_STREAM&#160;&#160;&#160;STM32_DMA_STREAM_ID(2, 7)</td>
        </tr>
      </table>
</div><div class="memdoc">

</div>
</div>
<a class="anchor" id="a02ab064f32c429288dce0b15b2e443a1"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define STM32_UART_USART2_DMA_PRIORITY&#160;&#160;&#160;0</td>
        </tr>
      </table>
</div><div class="memdoc">

</div>
</div>
<a class="anchor" id="ad1d292d78abf8f0b5a9e210d217a1cfe"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define STM32_UART_USART2_IRQ_PRIORITY&#160;&#160;&#160;12</td>
        </tr>
      </table>
</div><div class="memdoc">

</div>
</div>
<a class="anchor" id="af80e6c340ebc738f24275329c32db853"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define STM32_UART_USART2_RX_DMA_STREAM&#160;&#160;&#160;STM32_DMA_STREAM_ID(1, 5)</td>
        </tr>
      </table>
</div><div class="memdoc">

</div>
</div>
<a class="anchor" id="aacb71b8fee4d07ab0317ac8cc6ee9856"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define STM32_UART_USART2_TX_DMA_STREAM&#160;&#160;&#160;STM32_DMA_STREAM_ID(1, 6)</td>
        </tr>
      </table>
</div><div class="memdoc">

</div>
</div>
<a class="anchor" id="a4f49346cf0c36ac85466517ceff6299b"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define STM32_UART_USART3_DMA_PRIORITY&#160;&#160;&#160;0</td>
        </tr>
      </table>
</div><div class="memdoc">

</div>
</div>
<a class="anchor" id="a9c9553fdd3fc1f7790cbcbd784d54d54"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define STM32_UART_USART3_IRQ_PRIORITY&#160;&#160;&#160;12</td>
        </tr>
      </table>
</div><div class="memdoc">

</div>
</div>
<a class="anchor" id="ad5644ee22605eb7f136b390dba9f9725"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define STM32_UART_USART3_RX_DMA_STREAM&#160;&#160;&#160;STM32_DMA_STREAM_ID(1, 1)</td>
        </tr>
      </table>
</div><div class="memdoc">

</div>
</div>
<a class="anchor" id="a5339fe32096faad20bbcf31d2d5b45d1"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define STM32_UART_USART3_TX_DMA_STREAM&#160;&#160;&#160;STM32_DMA_STREAM_ID(1, 3)</td>
        </tr>
      </table>
</div><div class="memdoc">

</div>
</div>
<a class="anchor" id="a7e58662e757ecd7f20e8135c82393312"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define STM32_UART_USART6_DMA_PRIORITY&#160;&#160;&#160;0</td>
        </tr>
      </table>
</div><div class="memdoc">

</div>
</div>
<a class="anchor" id="aebae084c5d2daf88c58efd5a9c1d52af"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define STM32_UART_USART6_IRQ_PRIORITY&#160;&#160;&#160;12</td>
        </tr>
      </table>
</div><div class="memdoc">

</div>
</div>
<a class="anchor" id="a0cf68b359bf671f56cd200677a8496a5"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define STM32_UART_USART6_RX_DMA_STREAM&#160;&#160;&#160;STM32_DMA_STREAM_ID(2, 2)</td>
        </tr>
      </table>
</div><div class="memdoc">

</div>
</div>
<a class="anchor" id="ae32ac88b3b64552f9ecec5a038dfc544"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define STM32_UART_USART6_TX_DMA_STREAM&#160;&#160;&#160;STM32_DMA_STREAM_ID(2, 7)</td>
        </tr>
      </table>
</div><div class="memdoc">

</div>
</div>
<a class="anchor" id="a7b366b1eb660467c7ef9667705ad8308"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define STM32_UART_USE_USART1&#160;&#160;&#160;FALSE</td>
        </tr>
      </table>
</div><div class="memdoc">

</div>
</div>
<a class="anchor" id="ad9f8b9dcf8dd01e163b8d47c56cee1aa"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define STM32_UART_USE_USART2&#160;&#160;&#160;FALSE</td>
        </tr>
      </table>
</div><div class="memdoc">

</div>
</div>
<a class="anchor" id="a42b1761cd3b7e70eb3c5c90d9b92f52c"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define STM32_UART_USE_USART3&#160;&#160;&#160;TRUE</td>
        </tr>
      </table>
</div><div class="memdoc">

</div>
</div>
<a class="anchor" id="a6f5d3dfc7539503f8639d4be5b81928d"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define STM32_UART_USE_USART6&#160;&#160;&#160;TRUE</td>
        </tr>
      </table>
</div><div class="memdoc">

</div>
</div>
<a class="anchor" id="aa6f3292830116ce88ed2268f15f45448"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define STM32_USB_OTG1_IRQ_PRIORITY&#160;&#160;&#160;14</td>
        </tr>
      </table>
</div><div class="memdoc">

</div>
</div>
<a class="anchor" id="a3bef70abed53b8df90c5edb807077e37"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define STM32_USB_OTG1_RX_FIFO_SIZE&#160;&#160;&#160;512</td>
        </tr>
      </table>
</div><div class="memdoc">

</div>
</div>
<a class="anchor" id="a4026ae95617bb7ee1cbc32248e97e263"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define STM32_USB_OTG2_IRQ_PRIORITY&#160;&#160;&#160;14</td>
        </tr>
      </table>
</div><div class="memdoc">

</div>
</div>
<a class="anchor" id="a7c6ca71505c504cbd011d772af8cf665"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define STM32_USB_OTG2_RX_FIFO_SIZE&#160;&#160;&#160;1024</td>
        </tr>
      </table>
</div><div class="memdoc">

</div>
</div>
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          <td class="memname">#define STM32_USB_OTG_THREAD_PRIO&#160;&#160;&#160;LOWPRIO</td>
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          <td class="memname">#define STM32_USB_OTG_THREAD_STACK_SIZE&#160;&#160;&#160;128</td>
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          <td class="memname">#define STM32_USB_OTGFIFO_FILL_BASEPRI&#160;&#160;&#160;0</td>
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          <td class="memname">#define STM32_USB_USE_OTG1&#160;&#160;&#160;TRUE</td>
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          <td class="memname">#define STM32_USB_USE_OTG2&#160;&#160;&#160;FALSE</td>
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          <td class="memname">#define STM32F4xx_MCUCONF</td>
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